\documentclass[../main.tex]{subfiles}%
%
\SECT{Skills (CE)}{1.4em}
{Schematic Design \& PCB Layout, Processor Driver/Firmware
Development, Verilog}{}
%
{\begin{adjustwidth}{1.2in}{0in}\setstretch{1.25}
	%
	\SECTCONT{x86/ARM/MIPS/PowerPC development in C/C++ (some asm.)\ with
		modern build+test tools}
	\SECTCONT{Configuring \HREF{https://www.gnu.org/software/make/}{GNU make},
		\HREF{https://bazel.build/}{Bazel} and custom
		build systems, acclimating to large codebases}
	\SECTCONT{Altium \& KiCad schematic and PCB layout experience,
		some Spice simulation exp.}
	%
	\SECTC{Hardware Communication Protocols}
	{U[S]ART, I2C, CAN, SPI, USB, Ethernet, PCIe}
	{Non-blocking I/O \& RTOS, CANopen \& custom application layer
		protocol experience}
	%
	\SECTC{Hardware-Level Software Debugging}
	{Logic Analyzers, Oscilloscopes, Multimeters}
	{Proficient with debugging tools, aware of when to use
		(and how to not break them!)}
	%
	\SECTHEAD{Math \& Signal Processing}
	{Kalman filtering \& quarternions (gyro.\ + accel.\ work)}
	%
	\vspace{0.15in}
\end{adjustwidth}}
